This section provides background information related to the technology associated with the present disclosure and, as such, is not necessarily prior art.
Semiconductor memory devices have become more popular for use in various electronic devices. For example, non-volatile semiconductor memory is used in cellular telephones, digital cameras, personal digital assistants, mobile computing devices, non-mobile computing devices and other devices.
A charge-storing material such as a conductive floating gate or a non-conductive charge-trapping material can be used in some types of memory cells to store a charge which represents a data state. The memory cell may be a transistor in which the charge storing material may reside between a channel and a control gate. The charge-storing material may be insulated from both the channel and the control gate. The charge-storing material can be arranged vertically in a three-dimensional (3D) stacked memory structure, or horizontally in a two-dimensional (2D) memory structure. One example of a 3D memory structure is the Bit Cost Scalable (BiCS) architecture which comprises a stack of alternating conductive and dielectric layers.
Some types of memory cells may be programmed by altering the charge in the charge-storing material, thereby altering the threshold voltage (Vth) of the memory cell transistor. In one technique, a program voltage is applied to the control gate with a low voltage in the channel to add charge to the charge-storing material. After applying the program voltage, the memory cell's threshold voltage is tested by applying a verify voltage to the control gate, and testing whether the memory cell conducts a significant current. Additional program voltages may be applied to control gate, followed by verify voltages, until the memory cell's threshold current is within a target range.
The floating gate can hold a range of charges and therefore can be programmed to any threshold voltage level within a threshold voltage window. The size of the threshold voltage window is delimited by the minimum and maximum threshold levels of the device, which in turn correspond to the range of the charges that can be programmed onto the floating gate. The threshold window generally depends on the memory device's characteristics, operating conditions and history. Each distinct, resolvable threshold voltage level range within the window may, in principle, be used to designate a definite memory state of the cell.
Each memory cell of a memory array of a non-volatile memory system can to store a single bit of data by operating in a binary or single-bit mode, where two ranges of threshold levels of the storage element transistors are defined as storage levels. The threshold levels of transistors correspond to ranges of charge levels stored on their memory cells. The density of data storage of such memory arrays can be increased by storing more than one bit of data in each memory cell transistor. This is accomplished by defining more than two threshold levels as storage states for each memory cell transistor. For example, four such states may correspond with 2 bits of data per memory cell. More storage states, such as 16 states per memory cell, are also being implemented. Each memory cell transistor has a certain total range (threshold window) of threshold voltages in which it may practically be operated, and that range is divided into the number of states defined for it plus margins between the states to allow for them to be clearly differentiated from one another. Obviously, the more bits a memory cell is configured to store, the smaller is the margin of error it has to operate in.
Memory cells of the non-volatile memory system may be erased by a number of mechanisms. For example, a memory cell can be electrically erasable, by applying a high voltage to the substrate relative to the control gate so as to induce electrons in the floating gate to tunnel through a thin oxide to the substrate channel region (i.e., Fowler-Nordheim tunneling). Typically, the memory is electrically erasable either all at once or one or more minimum erasable blocks at a time, where a minimum erasable block may consist of one or more sectors and each sector may store 512 bytes or more of data.
Additionally, in order to provide acceptable performance of the non-volatile memory system for certain writing operations, it is also known to utilize to memory cells to temporarily store bits of data as a cache thereby improving performance of the non-volatile memory system. Such cache data may be copied out of those memory cells operating as the cache and rewriting the cache data back to other memory cells. However, such cache operation can adversely affect the durability or lifetime of the non-volatile memory system due to the number of times the memory cells may be electrically erased before writing data.
Accordingly, there is still a need for more improved non-volatile memory systems while providing adequate performance and durability.